Future Semiconductor Technology Laboratory

Materials for Advanced Packaging and Interconnection

Development of materials and processes for non-conductive films (NCFs) that enable bonding immediately after applying a polymer film material that functions as an underfill at the wafer level. Development of ultra-fine pitch thermo-compresssion (TC) flip chip bonding process using micro bump for 3D-TSV interconnection. Development of epoxy molding films (EMF) used as passivation molding materials for Fan-out Wafer Level Package (FOWLP) or Fan-out Panel Level Package (FOPLP).

As the continued scaling of semiconductor devices, several limitations of copper metal wire are also being shown such as increase of resisitivity and EM, TDDB reliability issues.

From the perspective of material science and engineering, we try to solve this problem by finding new advanced interconnect materials and developing its process comparable with CMOS process. It is necessary to develop new materials for advanced interconnect since electron mean free path and melting point are material properties, which is related with performance of interconnect.

On the other hand, atomic layer deposition (ALD) process, which was mainly used for the deposition of insulating layers, has recently been expanded for metal deposition. In particular, it is essential to form a highly uniform metal thin film on a complex 3D structured devices such as a 3D V-NAND device. Since the scale of the next-generation interconnect will be below 10nm or less, advanced interconnect materials need to be developed by ALD process as well.

Therefore, first of all, we try to find the candiate materials for advanced interconnect through theoretical calculation research and then, intend to develop an advanced process for that.